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ISL8487, ISL81483, ISL81487
Data Sheet November 2003 FN6050.1
1/8 Unit Load, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
These Intersil RS-485/RS-422 devices are "fractional" unit load (UL), BiCMOS, 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Unlike competitive devices, this Intersil family is specified for 10% tolerance supplies (4.5V to 5.5V). The ISL81483 and ISL81487 present a 1/8 unit load to the RS-485 bus, which allows up to 256 transceivers on the network for large node count systems (e.g., process automation, remote meter reading systems). The 1/4 UL ISL8487 allows up to 128 transceivers on the bus. In a remote utility meter reading system, individual (apartments for example) utility meter readings are routed to a concentrator via an RS-485 network, so the high allowed node count minimizes the number of repeaters required to network all the meters. Data for all meters is then read out from the concentrator via a single access port, or a wireless link. Slew rate limited drivers on the ISL8487 and ISL81483 reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Data rates up to 250kbps are achievable with these devices. Data rates up to 5Mbps are achievable by using the ISL81487, which features higher slew rates. Receiver (Rx) inputs feature a "fail-safe if open" design, which ensures a logic high Rx output if Rx inputs are floating. Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. These half duplex devices multiplex the Rx inputs and Tx outputs to allow transceivers with Rx and Tx disable functions in 8 lead packages.
Features
* Fractional Unit Load Allows up to 256 Devices on the Bus * Specified for 10% Tolerance Supplies * Class 3 ESD Protection (HBM) on all Pins. . . . . . . . >7kV * High Data Rate Version (ISL81487). . . . . . . up to 5Mbps * Slew Rate Limited Versions for Error Free Data Transmission (ISL8487, ISL81483) . . . . . . .up to 250kbps * Low Current Shutdown Mode (Except ISL81487) . . . 1nA * Low Quiescent Supply Current: - ISL8487, ISL81483. . . . . . . . . . . . . . . . . . 120A (Max.) - ISL81487 . . . . . . . . . . . . . . . . . . . . . . . . . 300A (Max.) * -7V to +12V Common Mode Input Voltage Range * Three State Rx and Tx Outputs * 30ns Propagation Delays, 5ns Skew (ISL81487) * Half Duplex Pinouts * Operate from a Single +5V Supply (10% Tolerance) * Current Limiting and Thermal Shutdown for driver Overload Protection * Drop-In Replacements for: MAX487 (ISL8487); MAX1483 (ISL81483); MAX1487, LMS1487 (ISL81487)
Applications
* High Node Count Networks * Automated Utility Meter Reading Systems * Factory Automation * Security Networks * Building Environmental Control Systems * Industrial/Process Control Networks
TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL8487 ISL81483 ISL81487 HALF/FULL DUPLEX Half Half Half NO. OF DEVICES DATA RATE SLEW-RATE RECEIVER/ QUIESCENT ALLOWED ON BUS (Mbps) LIMITED? DRIVER ENABLE? ICC (A) 128 256 256 0.25 0.25 5 Yes Yes No Yes Yes Yes 100 100 250 LOW POWER SHUTDOWN? Yes Yes No PIN COUNT 8 8 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL8487, ISL81483, ISL81487 Pinout
ISL8487, ISL81483, ISL81487 (PDIP, SOIC) TOP VIEW INPUTS
RO 1 RE 2 DE 3 DI 4 D R 8 7 6 5 VCC B/Z A/Y GND
Truth Tables
TRANSMITTING OUTPUTS DI 1 0 X X Z 0 1 High-Z High-Z * Y 1 0 High-Z High-Z *
RE X X 0 1
DE 1 1 0 0
*Shutdown Mode for ISL8487, ISL81483 (see Note 7)
Ordering Information
PART NO. ISL8487IB ISL8487IP ISL81483IB ISL81483IP ISL81487IB ISL81487IP TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 RECEIVING PACKAGE 8 Ld SOIC 8 Ld PDIP 8 Ld SOIC 8 Ld PDIP 8 Ld SOIC 8 Ld PDIP PKG. DWG. # M8.15 E8.3 M8.15 E8.3 M8.15 E8.3 RE 0 0 0 1 1 INPUTS DE 0 0 0 0 1 A-B +0.2V -0.2V Inputs Open X X OUTPUT RO 1 0 1 High-Z * High-Z
NOTE: SOIC also available in Tape and Reel; Add "-T" to suffix.
*Shutdown Mode for ISL8487, ISL81483 (see Note 7)
Pin Descriptions
PIN RO RE DE DI GND A/Y B/Z VCC FUNCTION Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating). Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. Ground connection. RS-485/422 level, noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. RS-485/422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is an output (Z) if DE = 1. System power supply input (4.5V to 5.5V).
Typical Operating Circuits
ISL8487, ISL81483, ISL81487
+5V + 8 VCC 1 RO 2 RE 3 DE 4 DI R B/Z A/Y 7 6 RT RT 7 B/Z 6 A/Y 0.1F 0.1F + 8 VCC D DI 4 DE 3 RE 2 R GND 5 GND 5 RO 1 +5V
D
2
ISL8487, ISL81483, ISL81487
Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Input/Output Voltages A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V) Short Circuit Duration Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating HBM (Per MIL-STD-883, Method 3015.7) . . . . . . . . . . . . . . >7kV
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (oC/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . 140 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range ISL8XXXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25oC, (Note 2) SYMBOL TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Driver Differential VOUT (no load) Driver Differential VOUT (with load)
VOD1 VOD2 VOD R = 50 (RS-422), (Figure 1) R = 27 (RS-485), (Figure 1)
Full Full Full Full
2 1.5 -
3 2.3 0.01
VCC 5 0.2
V V V V
Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States Logic Input High Voltage Logic Input Low Voltage Logic Input Current Input Current (A/Y, B/Z), (Note 10) (ISL81483, ISL81487)
R = 27 or 50, (Figure 1)
VOC VOC
R = 27 or 50, (Figure 1) R = 27 or 50, (Figure 1)
Full Full
-
0.01
3 0.2
V V
VIH VIL IIN1 IIN2
DE, DI, RE DE, DI, RE DE, DI, RE DE = 0V, VCC = 4.5 to 5.5V DE = 0V, VCC = 0V VIN = 12V VIN = -7V VIN = 12V VIN = -7V
Full Full Full Full Full Full Full Full Full Full 25 Full Full Full
2 -2 -0.2 3.5 -
70 -
0.8 2 140 -120 180 -100 250 -100 0.2 0.4 1
V V A A A A A A A V mV V V A
IIN2
Input Current (A/Y, B/Z), (Note 11) (ISL8487 Only) Receiver Differential Threshold Voltage Receiver Input Hysteresis Receiver Output High Voltage Receiver Output Low Voltage Three-State (high impedance) Receiver Output Current
IIN2
DE = 0V, VCC = 0V, or 4.5 to 5.5V -7V VCM 12V VCM = 0V IO = -4mA, VID = 200mV IO = -4mA, VID = 200mV 0.4V VO 2.4V
VIN = 12V VIN = -7V
VTH VTH VOH VOL IOZR
3
ISL8487, ISL81483, ISL81487
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25oC, (Note 2) (Continued) SYMBOL RIN TEST CONDITIONS -7V VCM 12V ISL81483, ISL81487 ISL8487 No-Load Supply Current, (Note 3) ICC ISL81487, DI, RE = 0V or VCC ISL8487, ISL81483, DI, RE = 0V or VCC Shutdown Supply Current Driver Short-Circuit Current, VO = High or Low Receiver Short-Circuit Current ISHDN IOSD1 IOSR DE = VCC DE = 0V DE = VCC DE = 0V TEMP (oC) Full Full Full Full Full Full Full Full Full MIN 96 48 35 7 TYP 300 250 150 100 1 MAX 500 300 200 120 50 250 85 UNITS k k A A A A nA mA mA
PARAMETER Receiver Input Resistance
(Note 7), DE = 0V, RE = VCC, DI = 0V or VCC DE = VCC, -7V VY or VZ 12V, (Note 4) 0V VO VCC
SWITCHING CHARACTERISTICS (ISL81487) Driver Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output High Driver Disable from Output Low Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output High Receiver Enable to Output Low Receiver Disable from Output High Receiver Disable from Output Low Maximum Data Rate tPLH, tPHL tSKEW tR, tF tZH tZL tHZ tLZ tPLH, tPHL tSKD tZH tZL tHZ tLZ fMAX RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) CL = 100pF, SW = GND, (Figure 3) CL = 100pF, SW = VCC, (Figure 3) CL = 15pF, SW = GND, (Figure 3) CL = 15pF, SW = VCC, (Figure 3) (Figure 4) (Figure 4) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) Full Full Full Full Full Full Full Full 25 Full Full Full Full Full 18 3 30 5 24 2 12 14 14 44 21 90 5 9 9 9 9 50 10 25 70 70 70 70 150 50 50 50 50 ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps
SWITCHING CHARACTERISTICS (ISL8487, ISL81483) Driver Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable from Output High Driver Disable from Output Low Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Enable to Output High Receiver Enable to Output Low Receiver Disable from Output High Receiver Disable from Output Low Maximum Data Rate Time to Shutdown tPLH, tPHL tSKEW tR, tF tZH tZL tHZ tLZ tPLH, tPHL tSKD tZH tZL tHZ tLZ fMAX tSHDN (Note 7) RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) RDIFF = 54, CL = 100pF, (Figure 2) CL = 100pF, SW = GND, (Figure 3, Note 5) CL = 100pF, SW = VCC, (Figure 3, Note 5) CL = 15pF, SW = GND, (Figure 3) CL = 15pF, SW = VCC, (Figure 3) (Figure 4) (Figure 4) CL = 15pF, SW = GND, (Figure 5, Note 6) CL = 15pF, SW = VCC, (Figure 5, Note 6) CL = 15pF, SW = GND, (Figure 5) CL = 15pF, SW = VCC, (Figure 5) Full Full Full Full Full Full Full Full 25 Full Full Full Full Full Full 250 250 250 250 300 300 250 250 50 650 160 900 1000 860 660 640 500 60 10 10 10 10 120 2000 800 2000 2000 2000 3000 3000 2000 50 50 50 50 600 ns ns ns ns ns ns ns ns ns ns ns ns ns kbps ns
4
ISL8487, ISL81483, ISL81487
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25oC, (Note 2) (Continued) SYMBOL tZH(SHDN) tZL(SHDN) tZH(SHDN) tZL(SHDN) TEST CONDITIONS CL = 100pF, SW = GND, (Figure 3, Notes 7, 8) CL = 100pF, SW = VCC, (Figure 3, Notes 7, 8) CL = 15pF, SW = GND, (Figure 5, Notes 7, 9) CL = 15pF, SW = VCC, (Figure 5, Notes 7, 9) TEMP (oC) Full Full Full Full MIN TYP 1000 1000 800 800 MAX 2000 2000 2500 2500 UNITS ns ns ns ns
PARAMETER Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 3. Supply current specification is valid for loaded drivers when DE = 0V. 4. Applies to peak current. See "Typical Performance Curves" for more information. 5. When testing the ISL8487 and ISL81483, keep RE = 0 to prevent the device from entering SHDN. 6. When testing the ISL8487 and ISL81483, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering SHDN. 7. The ISL8487 and ISL81483 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See "Low-Power Shutdown Mode" section. 8. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 9. Set the RE signal high time >600ns to ensure that the device enters SHDN. 10. Devices meeting these limits are denoted as "1/8 unit load (1/8 UL)" transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus, so there can be 256 1/8 UL devices on a bus. 11. Devices meeting these limits are denoted as "1/4 unit load (1/4 UL)" transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus, so there can be 128 1/4 UL devices on a bus.
Test Circuits and Waveforms
R VCC DE DI D Y R VOC Z VOD
FIGURE 1. DRIVER VOD AND VOC
5
ISL8487, ISL81483, ISL81487 Test Circuits and Waveforms (Continued)
3V DI 1.5V 1.5V 0V tPLH CL = 100pF Z D Y SIGNAL GENERATOR RDIFF CL = 100pF OUT (Z) 50% 50% VOL tPHL tPLH VOH 50% tPHL VOH VCC DE DI OUT (Y) 50% VOL
DIFF OUT (Y - Z) tR
90% 10%
90% 10% tF
+VOD -VOD
SKEW = |tPLH (Y or Z) - tPHL (Z or Y)|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE DI D SIGNAL GENERATOR Y CL SW Z 500 VCC GND DE NOTE 7 tZH, tZH(SHDN) (SHDN) for ISL8487 and ISL81483 only. NOTE 7 OUTPUT HIGH VOH - 0.5V OUT (Y, Z) 2.3V 0V tZL, tZL(SHDN) NOTE 7 OUT (Y, Z) 2.3V OUTPUT LOW VOL + 0.5V V OL tLZ VCC 1.5V 1.5V 0V tHZ VOH
3V
PARAMETER OUTPUT tHZ tLZ tZH tZL tZH(SHDN) tZL(SHDN) Y/Z Y/Z Y/Z Y/Z Y/Z Y/Z
RE X X 0 (Note 5) 0 (Note 5) 1 (Note 7) 1 (Note 7)
DI 1/0 0/1 1/0 0/1 1/0 0/1
SW GND VCC GND VCC GND VCC
CL (pF) 15 15 100 100 100 100
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
RE +1.5V B A R 15pF RO A 1.5V 1.5V
3V 0V tPLH tPHL VCC RO 50% 50% 0V
SIGNAL GENERATOR
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY
6
ISL8487, ISL81483, ISL81487 Test Circuits and Waveforms (Continued)
RE B R SIGNAL GENERATOR A RO 1k SW 15pF tZH, tZH(SHDN) (SHDN) for ISL8487 and ISL81483 only. NOTE 7 OUTPUT HIGH VOH - 0.5V RO 1.5V 0V tZL, tZL(SHDN) NOTE 7 RO 1.5V OUTPUT LOW VOL + 0.5V V OL tLZ VCC tHZ VOH VCC GND RE NOTE 7 3V 1.5V 1.5V 0V
PARAMETER tHZ tLZ tZH (Note 6) tZL (Note 6) tZH(SHDN) (Note 7) tZL(SHDN) (Note 7)
DE 0 0 0 0 0 0
A +1.5V -1.5V +1.5V -1.5V +1.5V -1.5V
SW GND VCC GND VCC GND VCC
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES
Application Information
RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000', so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields.
Receiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. All the receivers include a "fail-safe if open" function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). Receivers easily meet the data rates supported by the corresponding driver, and receiver outputs are three-statable via the active low RE input.
Driver Features
The RS-485 and RS-422 driver is a differential output device that delivers at least 1.5V across a 54 load (RS-485), and at least 2V across a 100 load (RS-422). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. Driver outputs are three-statable via the active high DE input. The ISL8487 and ISL81483 driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Data rate on these slew rate limited versions is a maximum of 250kbps. ISL81487 drivers are not limited, so faster output transition times allow data rates of at least 5Mbps.
Receiver Features
These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is 200mV, as required by the RS-422 and RS-485 specifications. Receiver input resistance of 96k surpasses the RS-422 spec of 4k, and is eight times the RS-485 "Unit Load (UL)" requirement of 12k minimum. Thus, these products are known as "one-eighth UL" transceivers, and there can be up to 256 of these devices on a network while still complying with the RS-485 loading spec.
Data Rate, Cables, and Terminations
RS-485 and RS-422 are intended for network lengths up to 4000', but the maximum system data rate decreases as the transmission length increases. Devices operating at 5Mbps are limited to lengths less than a few hundred feet, while the 250kbps versions can operate at full data rates with lengths in excess of 1000'.
7
ISL8487, ISL81483, ISL81487
Twisted pair is the cable of choice for RS-485/RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. To minimize reflections, proper termination is imperative when using the 5Mbps device. Short networks using the 250kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. voltage range extremes. Additionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, these devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15 degrees. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown.
Low Power Shutdown Mode (Excluding ISL81487)
These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but the ISL8487 and ISL81483 include a shutdown feature that reduces the already low quiescent ICC to a 1nA trickle. They enter shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 50ns guarantees that shutdown is not entered. Note that receiver and driver enable times increase when enabling from shutdown. Refer to Notes 5-9, at the end of the Electrical Specification table, for more information.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers survive worst case bus contentions undamaged. These devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the RS-485 spec, even at the common mode
Typical Performance Curves
90 80 DRIVER OUTPUT CURRENT (mA) 70 60 50 40 30 20 10 0 0 1 2 3
VCC = 5V, TA = 25oC, ISL8487, ISL81483 and ISL81487; Unless Otherwise Specified
3.6 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -40 RDIFF = 54 RDIFF = 100
4
5
-25
0
25
50
75
85
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (oC)
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE
8
ISL8487, ISL81483, ISL81487 Typical Performance Curves
160 140 120 100 OUTPUT CURRENT (mA) 80 60 ICC (A) 40 20 0 -20 -40 -60 Y OR Z = HIGH 100 ISL8487E, ISL81487L, DE = VCC, RE = X ISL8487E, ISL81487L, DE = GND, RE = GND 8 10 12 50 -40 -25 0 25 50 75 85 200 Y OR Z = LOW ISL8487E, ISL81487L 250 ISL81487E, DE = GND, RE = X ISL81487E 300 ISL81487E, DE = VCC, RE = X
VCC = 5V, TA = 25oC, ISL8487, ISL81483 and ISL81487; Unless Otherwise Specified (Continued)
350
150
ISL81487E -80 ISL8487E, ISL81487L -100 -120 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V)
TEMPERATURE (oC)
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
750
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
250
700 PROPAGATION DELAY (ns)
tPLHY tPLHZ
200 |tPLHY - tPHLZ| 150 SKEW (ns)
650
600 tPHLY 550 tPHLZ 500
|tPHLY - tPLHZ| 100
50 |CROSS PT. OF Y & Z - CROSS PT. OF Y & Z| 0 -40
450 -40
-25
25 TEMPERATURE (oC)
0
50
75
85
-25
0 25 TEMPERATURE (oC)
50
75
85
FIGURE 10. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL8487, ISL81483)
30 28 PROPAGATION DELAY (ns)
FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL8487, ISL81483)
5
4 26 24 tPLHY 22 tPLHZ 20 18 tPHLY 16 -40 -25 0 25 50 75 85 0 -40 tPHLZ SKEW (ns) 3 |tPLHY - tPHLZ| 2 |tPHLY - tPLHZ|
1 |CROSSING PT. OF Y & Z - CROSSING PT. OF Y & Z|
-25
0
25
50
75
85
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 12. DRIVER PROPAGATION DELAY vs TEMPERATURE (ISL81487)
FIGURE 13. DRIVER SKEW vs TEMPERATURE (ISL81487)
9
ISL8487, ISL81483, ISL81487 Typical Performance Curves
RECEIVER OUTPUT (V) DI
VCC = 5V, TA = 25oC, ISL8487, ISL81483 and ISL81487; Unless Otherwise Specified (Continued)
DRIVER INPUT (V) RECEIVER OUTPUT (V) RDIFF = 54, CL = 100pF 5 DI 0 5 RO 0 DRIVER INPUT (V) DRIVER INPUT (V)
RDIFF = 54, CL = 100pF 5 0 5 RO 0
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
4 B/Z 3 2 1 0 TIME (400ns/DIV) A/Y
4 3 2 1 0 TIME (400ns/DIV) A/Y B/Z
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL8487, ISL81483)
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL8487, ISL81483)
RECEIVER OUTPUT (V)
DRIVER INPUT (V)
RDIFF = 54, CL = 100pF DI 5 0 5 RO 0
RECEIVER OUTPUT (V)
RDIFF = 54, CL = 100pF DI 5 0 5 RO 0
DRIVER OUTPUT (V)
4 3 2 1 0 TIME (20ns/DIV) B/Z
DRIVER OUTPUT (V)
4 3 2 1 0 TIME (20ns/DIV) A/Y B/Z
A/Y
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL81487)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL81487)
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 518 PROCESS: Si Gate CMOS
10
ISL8487, ISL81483, ISL81487 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E
A A1 A2 B B1 C D D1 E
-C-
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 8 0.430 0.150 -
2.54 BSC 7.62 BSC 10.92 3.81 8
2.93
11
ISL8487, ISL81483, ISL81487 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12


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